We Are BlueShift MEMORY

Blueshift Memory’s proprietary chip design optimizes the memory architecture for more efficient handling of large data sets and time-critical data, enabling up to 1,000 times faster memory access for specific data-focused applications. These include high performance computing, artificial intelligence (AI), machine vision for augmented and virtual reality (AR/VR), 5G edge connectivity and the Internet of Things (IoT). The focus of Blueshift Memory’s technology is the Cambridge Architecture™, the next-generation technology for stored-program machines, designed to replace the currently-used modified Harvard architecture and to overcome the traditional constraints of the von Neumann bottleneck.

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Accelerating memory access

Processors continue to evolve according to Moore’s Law, but memory technology has essentially remained the same. This means that communication between the host and the memory has become a major bottleneck in computer architecture. This is true whether the host is a CPU, GPU, TPU, AI Engine or FPGA, and likewise for DRAM, SSD/HDD and cloud storage. The performance gap is growing by around 50% each year. A new kind of architecture is needed.
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How Blueshift Memory can remove the bottleneck

Blueshift Memory’s proprietary chip design optimizes the memory architecture for more efficient handling of large data sets and time-critical data, enabling up to 1,000 times faster memory access for specific data-focused applications like high performance computing, AI, and AR/VR. The focus of Blueshift Memory’s technology is the Cambridge Architecture™, the next-generation technology for stored-program machines, designed to replace the modified Harvard architecture and to overcome the traditional constraints of the von Neumann bottleneck.
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Data structures matter

Programmers worry about data structures, and they write code that understands those structures. That understanding is lost when the code is compiled into assembler. The CPU calculates addresses and indexes in a random fashion, and each memory access is discrete. This approach is power hungry and inefficient. By adding back that understanding of data structure, the Cambridge Architecture™ delivers zero-latency memory while reducing energy consumption by 30 - 50% and orders of magnitude more speed, tailored to the needs of big data applications.

Our Technology

About The “Memory Wall”

Modern computing workloads are highly memory intensive, and they are increasingly structured. The industry has hit a Memory Wall because existing memory technologies (HBM and DDR4/5) have not kept pace with data demands. Although memory technology has evolved, the basic architecture has remained the same. This means its performance is inhibited by the Von Neumann bottleneck, and memory is no longer keeping pace with the Moore’s Law progression in processing power.

The Cambridge Architecture

As data grows bigger, caches are less effective and memory access becomes the dominant consumer of energy. This is unsustainable – industry needs a new approach. The Cambridge Architecture™ is a memory architecture that understands data structures: the next generation of Stored Program Machines.
  • Zero latency memory
  • Energy efficiency improved by more than 200%
  • Performance improvements 2x to 1000x
  • Especially well suited to big data, in-memory computing/databases

Memory acceleration use cases

Blueshift Memory offers significant performance benefits, accelerating use cases requiring access to large amounts of memory in databases, including:
  • Big data and in-memory databases
  • AI training
  • High-Frequency Trading
  • Image processing
  • Computer vision

Integration points

Blueshift memory technology is architectural and is independent from the applied memory cell technology. Cambridge Architecture™ IP can be integrated into any of the following:
  • a memory controller,
  • an accelerator card,
  • SSD/HDD data storage
  • network storage
Alternatively, as a SoC, it can be integrated into a CPU, TPU, GPU or an AI engine.
  • “Bottlenecks have arisen in traditional architectures that are driving the industry to re-think how systems should be designed moving forward”Steven Woo, Rambus
  • “The rapid growth in the number of modern CPU cores is putting pressure on memory”Data centers need a new paradigm, Ed Sperling
  • “There has long been talk of a so-called ‘memory wall’ which would limit future innovation on future processing breakthroughs.”
  • “Multicore processing has been the conventional way to accelerate computing. However, more processors mean increased demand on memory, so memory bandwidth and latency have now become the barriers to computing performance. Blueshift Memory’s technology is focused on addressing this issue by improving bandwidth by more than 1000 times and substantially reducing latency.”Guillaume d’Eyssautier, Member of the GSA EMEA Leadership Council
  • “The difference between a bad programmer and a good one is whether he considers his code or his data structures more important. Bad programmers worry about the code. Good programmers worry about data structures and their relationships.”Linus Torvalds

THE TEAM

Dr. Audrey Stone

CEO, Technology & IP Lawyer
With a proven executive management track record and over 15 years of experience in Strategic Advice on Technological Law, IP, M&A, Licensing and International Transactions.
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Peter Marosan

CTO, Primary inventor
Lead of key development projects with the European Space Agency, the Hungarian Academy of Science, Econet and UGS.
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Dr Theodore Omtzigt

Director of HW Development
Global technology leader. Key technology development roles in NVIDIA, Intel, 3DFX and Stillwater Supercomputing.
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Helen Duncan

Marketing and Communications Manager
Marketing & PR expert and technology writer with over 40 years experience in semiconductors and electronics. Chartered engineer.
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BOARD OF ADVISORS

Guillaume d'Eyssautier

45 years of experience in the semiconductor industry in leading positions at Matra Harris Semiconductors, GEC-Plessey Semiconductors, Rockwell Semiconductor, IBM Technology , Cadence and a few Start-ups. Serial entrepreneur with a keen eye for business development
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Rupert Baines

Track record in accelerating enterprise growth, monetizing semiconductor Intellectual Property assets and corporate development investments. A seasoned advisor for startup acceleration on global sales, marketing and business development.
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Kitrick Sheets

Global authority in supercomputing development, formerly Principal Engineer for Cray and Supercomputer Systems Inc. Together with his team he developed Jaguar, the fastest supercomputer in the world in 2009.
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Contact Us

Hauser Forum, 3 Charles Babbage Rd,
Cambridge CB3 0GT U.K.
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